MuPi



Employment

THESES SUPERVISED

 

Ph.D. THESIS STUDENTS
 

  1. Ping Yang (Ph.D. 1980) 

    Ph.D. Thesis:"An investigation of ordering, tearing and latency algorithm for the time-domain simulation of large circuit" 

  2. You-Pang Wei (Ph.D. 1982)

    Ph.D. Thesis: "Large-scale circuit simulation"

  3. Daniel G. Saab (M.S. 1985, Ph.D. 1987)

    M.S. Thesis: "Symbolic switch-level logic and fault simulation of MOS VLSI circuits"

    Ph.D. Thesis: "Logic and fault simulation of VLSI circuits including hierarchical techniques"

  4. Ongky  Tejayadi (Ph.D. 1987)

    Ph.D. Thesis: "Piecewise-linear approach for timing simulation of VLSI circuits on serial and parallel computers"

  5. Mi-Chang Chang (Ph.D. 1989)

    Ph.D. Thesis: "Efficient direct-method parallel circuit simulation using multilevel node tearing"

  6. Farid N. Najm (M.S. 1986, Ph.D. 1989)

    M.S. Thesis: "Switch-level test generation for MOS VLSI circuits"

    Ph.D. Thesis: Probabilistic simulation for reliability analysis of VLSI circuits"

  7. David V. Overhauser (M.S. 1985, Ph.D. 1989)

    M.S. Thesis: "A new approach to switch-level timing simulation of CMOS VLSI circuits"

    Ph.D. Thesis: "Fast timing simulation of MOS VLSI circuits"

  8. Perry Gee (M.S. 1985, Ph.D. 1989)

    M.S. Thesis: "Silicon compilation: A solution to the complexity of VLSI circuit design"

    Ph.D. Thesis: "iSITE: Automatic circuit synthesis for double-metal CMOS VLSI circuits"

  9. Pi-Yu (Emerald) Chung (M.S. 1990, Ph.D. 1993)

    M.S. Thesis: "Parallel solution of sparse linear systems on a vector multiprocessor computer"

    Ph.D. Thesis: "Diagnosis and correction of logic design errors"

  10. Harish Kriplani (Ph.D. 1993)

    Ph.D. Thesis: "Worst case voltage drops in power and ground buses of CMOS VLSI circuits"

  11. Weitong Chuang (Ph.D. 1994)

    Ph.D. Thesis: "Timing and area optimization for VLSI circuits and layout"

  12. Ping-Chung Li (Ph.D. 1994)

    Ph.D. Thesis: "A simulation and redesign system for circuit hot-carrier reliability"

  13. George I. Stamoulis (M.S. 1991, Ph.D. 1994)

    M.S. Thesis: "New technique for probabilistic simulation of VLSI CMOS circuits"

    Ph.D. Thesis: "Probabilistic simulation for reliability and average power estimation"

  14. Terry P.-C. Lee (M.S. 1990, Ph.D. 1995)

    M.S. Thesis: "A switch-level concurrent fault simulator for MOS circuits"

    Ph.D. Thesis: "Test generation and evaluation for bridging faults in CMOS VLSI circuits"

  15. Howard Chen (Ph.D. 1997)

    Ph.D. Thesis: "A hybrid (Logic+IDDQ) testing strategy for bridging faults"

  16. Andreas Veneris (Ph.D. 1998)

    Ph.D. Thesis: "Multiple design error diagnosis and correction in digital VLSI circuits"

  17. Nikos Bellas (Ph.D. 1998)

    Ph.D. Thesis: "Architectural and compiler techniques for energy reduction in high performance microprocessors"

  18. Sumart Ramprasad (Ph.D. 1998)

    Ph.D. Thesis: "Power estimation and minimization of digital processing systems"

  19. Ninglong Lu

  20. Sudhakar Bobba

  21. Murat Becer

  22. Geng Bai

     

 

M.S. THESIS STUDENTS
 

  1. Kenneth Jung (M.S. 1983)

    M.S. Thesis: "A piecewise-linear approach to transient analysis of large-scale circuits"

  2. Keith Anderson (M.S. 1984)

    M.S. Thesis: "A study of Gauss-Seidel-Type methods for simulating large-scale circuits"

  3. Kin-Man Ivy Lui (M.S. 1984)

    M.S. Thesis: "Special purpose computer architecture for LU factorization of partitioned systems"

  4. Ser Yen Chia (M.S. 1985)

    M.S. Thesis: "Time-domain analysis of large-scale integrated circuits by piecewise-linear techniques"

  5. Miranda L. Wojciechowski (Hung) (M.S. 1985)

    M.S. Thesis: "Modified wavefront array processor for circuit simulation"

  6. Andrew J. Stein (M.S. 1985)

    M.S. Thesis: "Parallel architecture for concurrent fault simulation"

  7. Madhaav P. Desai (M.S. 1986)

    M.S. Thesis: "Parallel algorithm for circuit simulation"

  8. Andrew T. Yang (M.S. 1986)

    M.S. Thesis: "Delay modeling of bipolar ECL/EFL circuits"

  9. Ferudun Top (M.S. 1981)

    M.S. Thesis: "Time-scaling decomposition of networks"

  10. Robert Whitstone (M.S. 1998)

  11. Thomas S. Messerges (M.S. 1989)

    M.S. Thesis: "A novel switch-level logic simulator for VLSI MOS circuits"

  12. Russell M. Iimura (M.S. 1990)

    M.S. Thesis: "iCHARM: Hierarchical CMOS circuit extraction with power bus extraction"

  13. Elizabeth J. Brauer (M.S. 1991)

    M.S. Thesis: "Circuit simulation of large emitter-coupled logic circuits"

  14. Yi-Fan Hsu (M.S. 1992)

    M.S. Thesis: "A detailed electrical simulator for use in mixed-mode simulation of MOS VLSI circuits"

  15. Satish Sathe (M.S. 1992)

    M.S. Thesis: "Efficient fast timing simulation of CMOS VLSI circuits"

  16. Gautham D. Kamath (M.S. 1993)

    M.S. Thesis: "RC extraction of VLSI power using primitive splitting, finite element analysis, and the boundary element method"

  17. David D. Greve (M.S. 1993)

    M.S. Thesis: "The derivation of analytical design equations for built-in current sensors for use in IDDQ testing"

  18. Yanmei Tian (M.S. 1995)

    M.S. Thesis: "Mixed-mode timing simulation for accurate CMOS bridging fault detection"

  19. Vikram Saxena (M.S. 1996)

    M.S. Thesis: "Statistical power estimation for sequential CMOS circuits"

  20. Mohammad Mansour